The manufacture of integrated circuit semiconductor chips requires the plating of conductive leads about the periphery of the chip. Typically, a semiconductor rod is cut into disk-like wafers having a diameter ranging from 3 to 8 inches. The formation of integrated circuit patterns on the wafer to define a plurality of circuit "chips" involves the application of a photoresist layer to one surface of the wafer. Conductive leads are then formed about each of the circuits, typically by plating gold or copper onto the wafer.
The photoresist coating is applied to the wafer during formation so as to leave a narrow band of non-coated surface exposed about the perimeter of the circuit surface of the wafer. Conventional processes for forming the leads about these circuit chips include "bump plating" methods. The wafer is immersed in an electrolyte bath, such as, for example, a cyanide gold solution for plating gold leads. The wafer is contacted on the non-coated periphery, and current is applied across the wafer and an anode, also immersed in the electrolytic bath, such as a platinum anode for gold plating. Current is applied until the desired thickness of plating builds up on the wafer.
Traditional bump plating methods do not provide for uniformity in the plating thickness over the exposed surfaces of the wafer, however. The thickness of the plated leads may vary up to 200% across the width of the wafer. This results in a large rate of unacceptable chips being produced from each wafer.